1. Field of the Invention
The present invention relates to a merged memory-logic semiconductor device having a memory device and a logic device formed on a semiconductor substrate, and to a method for manufacturing the semiconductor device.
2. Description of the Background Art
The recent miniaturization of merged memory-logic semiconductor devices is leading to reduction of memory cell areas. Accordingly, in order to ensure certain capacitor capacitance even with reduced memory cell areas, MIM (Metal-Insulator-Metal) capacitors are now often adopted as memory cell capacitors.
When MIM capacitors are adopted as memory cell capacitors, the process of forming the dielectric film may oxidize contact plugs connected to the lower electrodes and neighboring contact plugs to increase the contact resistance. In order to solve this problem, Japanese Patent Application Laid-Open No. 2001-267516 discloses a technique for preventing the increase in contact resistance by providing an oxidation-preventing barrier layer on top ends of contact plugs. Also, Japanese Patent Application Laid-Open Nos. 2001-284541 and 10-150161 (1998) disclose techniques about semiconductor devices with capacitors.
However, with merged memory-logic semiconductor devices, it is difficult to achieve both of a reduction in contact resistance in the memory device and a reduction in contact resistance in the logic device.